Binary Analysis
→ Hardware Reverse Engineering
Advanced static and dynamic analysis on compiled binaries using Ghidra to map logic flows, trace memory patterns, and neutralize software vulnerabilities. Extracted and audited embedded firmware images from physical IoT microcontrollers to analyze boot validation sequences and map hardware attack surfaces.
Closed-source IoT devices had undocumented behavior and potential vulnerabilities. Needed to understand their internals without source code or documentation.
Used Ghidra for static and dynamic binary analysis. Extracted firmware images from physical microcontrollers via JTAG, mapped boot validation sequences, and identified hardware attack surfaces.
Deep binary inspection utilizing Ghidra headless analyzer scripts alongside hardware debug probes (JTAG/SWD). Firmware binary dumps were decompiled into ARM Cortex-M assembly to audit Secure Boot verification routines and identify hardcoded cryptographic keys.
- Glitch attack / Voltage fault injection bypassing bootloader authentication
- Insecure JTAG pin exposed on PCB test pads allowing raw memory dump
- Stack buffer overflow in hardcoded diagnostic commands
; Ghidra Decompiled ARM Assembly
000104a2: 4b 68 ldr r3, [r1, #4] ; Load auth header magic
000104a4: 2b 49 ldr r1, =0xDEADBEEF ; Compare against hardcoded check
000104a6: 9b 42 cmp r3, r1
000104a8: 03 d1 bne boot_failed ; NOP out to bypass signature check!Vector Analysis: Direct memory injection over JTAG debug interface bypasses public-key signature verification during cold boot phase.
Remediation: Disable physical JTAG debug ports using hardware eFuses (Blow eFuse DEBUG_DISABLE) and implement MCU memory protection units (MPU).
| Vulnerability Exposure | Defensive Architecture Countermeasure |
|---|---|
| Exposed JTAG Test Pads | Permanent eFuse debug blow after factory provisioning |
| Unencrypted Flash Storage | Enable On-The-Fly Flash Encryption (AES-XTS) |
| Hardcoded Secret Keys | Provision per-device keys inside hardware Secure Element |